Build an AND gate using two NAND chips and understand every wire.
This is not programming. This is describing wiring on a circuit board. Forget “code”. Imagine two NAND chips on a table.
Nand(a=a, b=b, out=n1);
Take a NAND chip, connect input pin a of this chip to input a of AND, input pin b to input b of AND. Take its output wire and name it n1.
a ───┐
NAND ─── n1
b ───┘
Nand(a=n1, b=n1, out=out);
This is a different physical NAND chip with pins a and b. Connect both inputs to the wire n1 from NAND 1. Output is out.
a ───┐
│ ┌─────────┐
├───────►│ NAND 1 │──── n1 ───┬────► a (NAND 2)
│ └─────────┘ │
b ───┘ └────► b (NAND 2)
┌─────────┐
│ NAND 2 │──── out
└─────────┘
Hardware Description Language (HDL) describes connections, not instructions.
CHIP And {
IN a, b;
OUT out;
PARTS:
Nand(a=a, b=b, out=n1);
Nand(a=n1, b=n1, out=out);
}
Open projects/01/And.hdl, load And.tst, and click Run All. Observe the Chip panel:
| a | b | n1 (internal) | out |
|---|---|---|---|
| 0 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
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