Session 2: AND Gate using NAND

Objective

Build an AND gate using two NAND chips and understand every wire.

Think Physical, Not Code

This is not programming. This is describing wiring on a circuit board. Forget “code”. Imagine two NAND chips on a table.

Line 1

Nand(a=a, b=b, out=n1);

Take a NAND chip, connect input pin a of this chip to input a of AND, input pin b to input b of AND. Take its output wire and name it n1.

a ───┐
     NAND ─── n1
b ───┘

Line 2

Nand(a=n1, b=n1, out=out);

This is a different physical NAND chip with pins a and b. Connect both inputs to the wire n1 from NAND 1. Output is out.

a ───┐
     │        ┌─────────┐
     ├───────►│  NAND 1 │──── n1 ───┬────► a (NAND 2)
     │        └─────────┘           │
b ───┘                              └────► b (NAND 2)
                                     ┌─────────┐
                                     │  NAND 2 │──── out
                                     └─────────┘

HDL Code

Hardware Description Language (HDL) describes connections, not instructions.


CHIP And {
    IN a, b;
    OUT out;

    PARTS:
    Nand(a=a, b=b, out=n1);
    Nand(a=n1, b=n1, out=out);
}

Action & Practice

Open projects/01/And.hdl, load And.tst, and click Run All. Observe the Chip panel:

abn1 (internal)out
0010
0110
1010
1101

Key Insights

Motivation

Never say bad about yourself while learning. Pain and challenge mean growth and transformation. You are improving every step.